I'm Abner, a PhD student major in Computer Science and Engineering.

I am currently focus on performance analysis of accelerators, encompassing performance modeling, software‑hardware co‑design and evaluation, and agile accelerator design‑space exploration. In particular, the automatic generation of accelerator hardware through high‑level language compilation.

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San Francisco, 2025

News

  • Received Year 2025 Provincial Outstanding Student Award
  • Got First Prize (rank 5) as 64bit-brainstorm Captain at ASC22-23 (10th ASC)!

Publications

  • [TPDS'2025] SSpMM: Efficiently Scalable SpMM Kernels Across Multiple Generations of Tensor Cores, in IEEE Transactions on Parallel and Distributed Systems, vol. 36, no. 12, pp. 2652-2667, Dec. 2025. Zeyu Xue, Mei Wen, Jianchao Yang, Minjin Tang, Zhongdi Luo, Jing Feng, Yang Shi, Zhaoyun Chen, Junzhong Shen and Johannes Langguth. Read more→
  • [TVLSI'2024] ABS: Accumulation Bit-Width Scaling Method for Designing Low-Precision Tensor Core, in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 9, pp. 1590-1601, Sept. 2024. Yasong Cao, Mei Wen, Zhongdi Luo, Xin Ju, Haolan Huang, Junzhong Shen. Read more→

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